Diclib.com
Словарь ChatGPT

Поиск в словаре Индивидуальные решения

Введите слово или словосочетание на любом языке 👆

Язык:

Перевод и анализ слов искусственным интеллектом ChatGPT

На этой странице Вы можете получить подробный анализ слова или словосочетания, произведенный с помощью лучшей на сегодняшний день технологии искусственного интеллекта:

как употребляется слово
частота употребления
используется оно чаще в устной или письменной речи
варианты перевода слова
примеры употребления (несколько фраз с переводом)
этимология

Что (кто) такое instruction set - определение

SET OF ABSTRACT SYMBOLS (CALLED INSTRUCTIONS) WHICH IDENTIFY AND DESCRIBE OPERATIONS IN A COMPUTER PROGRAM TO A COMPUTER PROCESSOR

Instruction set architectures; Instruction Set Architecture; Instruction Set; Instruction (computer science); Register pressure; Load/store instruction; Load/Store instruction; Electronic action; Zero address machine; Zero-address machine; 0-operand instruction set; Instruction width; Code density; Instruction Sets; Instruction(s) (computer science); Instruction (computing); Native instruction; Variable-length instruction word; Variable-width instruction; Variable width instruction set; Variable width instruction; Variable-width instruction set; Variable length instruction set; Variable length instruction; Variable-length instruction set; Variable-length instruction; Fixed length instruction set; Fixed length instruction; Fixed-length instruction set; Fixed-length instruction; Fixed-width instruction; Fixed-width instruction set; Fixed width instruction; Fixed width instruction set; SIMD instruction; Arithmetic and logic operation; Arithmetic/logic instruction; Load and store instructions; Instruction set; Classification of instruction set architectures

Найдено результатов: 2104

instruction set

¦ noun Computing the complete set of instructions in machine code that can be recognized by a central processing unit.

instruction set

<architecture> The collection of machine language instructions that a particular processor understands. The term is almost synonymous with "{instruction set architecture}" since the instructions are fairly meaningless in isolation from the registers etc. that they manipulate. (1999-07-05)

instruction set architecture

<architecture> (ISA) The parts of a processor's design that need to be understood in order to write assembly language, such as the machine language instructions and registers. Parts of the architecture that are left to the implementation, such as number of superscalar functional units, cache size and cycle speed, are not part of the ISA. The definition of SPARC, for example, carefully distinguishes between an implementation and a specification. (1999-01-16)

Reduced Instruction Set Computer

PROCESSOR EXECUTING ONE INSTRUCTION IN MINIMAL CLOCK CYCLES

Reduced Instruction Set Computer; RISC processor; Reduced Instruction Set Code; Reduced Instruction Set Computing; RISC; RISC-based; RISC-based system; RISC System/6000 SP; Reduced instruction set; RISC architectures; RISC instruction set; RISC-based computer design approach; RISC principles; Reduced instruction set computing

<processor> (RISC) A processor whose design is based on the rapid execution of a sequence of simple instructions rather than on the provision of a large variety of complex instructions (as in a Complex Instruction Set Computer). Features which are generally found in RISC designs are uniform instruction encoding (e.g. the op-code is always in the same bit positions in each instruction which is always one word long), which allows faster decoding; a homogenous {register set}, allowing any register to be used in any context and simplifying compiler design; and simple addressing modes with more complex modes replaced by sequences of simple arithmetic instructions. Examples of (more or less) RISC processors are the {Berkeley RISC}, HP-PA, Clipper, i960, AMD 29000, MIPS R2000 and DEC Alpha. IBM's first RISC computer was the RT/PC (IBM 801), they now produce the RISC-based {RISC System/6000} and SP/2 lines. Despite Apple Computer's bogus claims for their PowerPC-based Macintoshes, the first RISC processor used in a personal computer was the Advanced RISC Machine (ARM) used in the Acorn Archimedes. (1997-06-03)

Reduced instruction set computer

PROCESSOR EXECUTING ONE INSTRUCTION IN MINIMAL CLOCK CYCLES

Reduced Instruction Set Computer; RISC processor; Reduced Instruction Set Code; Reduced Instruction Set Computing; RISC; RISC-based; RISC-based system; RISC System/6000 SP; Reduced instruction set; RISC architectures; RISC instruction set; RISC-based computer design approach; RISC principles; Reduced instruction set computing

In computer engineering, a reduced instruction set computer (RISC) is a computer designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set computer (CISC), a RISC computer might require more instructions (more code) in order to accomplish a task because the individual instructions are written in simpler code.

https://en.wikipedia.org/wiki/Reduced_instruction_set_computer

Instruction set architecture

In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an implementation.

https://en.wikipedia.org/wiki/Instruction_set_architecture

Atmel AVR instruction set

BKASH

AVR instruction set; Atmel avr instruction set

The Atmel AVR instruction set is the machine language for the Atmel AVR, a modified Harvard architecture 8-bit RISC single chip microcontroller which was developed by Atmel in 1996. The AVR was one of the first microcontroller families to use on-chip flash memory for program storage.

https://en.wikipedia.org/wiki/Atmel_AVR_instruction_set

FMA instruction set

X86 INSTRUCTION SET EXTENSION DEVELOPED BY INTEL

FMA4 instruction set; FMA3 instruction set; FMA3; FMA4

The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations."FMA3 and FMA4 are not instruction sets, they are individual instructions -- fused multiply add.

https://en.wikipedia.org/wiki/FMA_instruction_set

Visual Instruction Set

SIMD INSTRUCTION SET FOR SPARC PROCESSORS

Visual instruction set

Visual Instruction Set, or VIS, is a SIMD instruction set extension for SPARC V9 microprocessors developed by Sun Microsystems. There are five versions of VIS: VIS 1, VIS 2, VIS 2+, VIS 3 and VIS 4.

https://en.wikipedia.org/wiki/Visual_Instruction_Set

Alternate Instruction Set

INSTRUCTION SET ARCHITECTURE

ALTINST; Deeply Embedded Instruction Set; VIA AIS; VIA Alternate Instruction Set

The Alternate Instruction Set (AIS) is a second 32-bit instruction set architecture found in some x86 CPUs made by VIA Technologies. On these VIA C3 processors, the second hidden processor mode is accessed by executing the x86 instruction ALTINST ().

https://en.wikipedia.org/wiki/Alternate_Instruction_Set

Википедия

Instruction set architecture

In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an implementation.

In general, an ISA defines the supported instructions, data types, registers, the hardware support for managing main memory, fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of a family of implementations of the ISA.

An ISA specifies the behavior of machine code running on implementations of that ISA in a fashion that does not depend on the characteristics of that implementation, providing binary compatibility between implementations. This enables multiple implementations of an ISA that differ in characteristics such as performance, physical size, and monetary cost (among other things), but that are capable of running the same machine code, so that a lower-performance, lower-cost machine can be replaced with a higher-cost, higher-performance machine without having to replace software. It also enables the evolution of the microarchitectures of the implementations of that ISA, so that a newer, higher-performance implementation of an ISA can run software that runs on previous generations of implementations.

If an operating system maintains a standard and compatible application binary interface (ABI) for a particular ISA, machine code will run on future implementations of that ISA and operating system. However, if an ISA supports running multiple operating systems, it does not guarantee that machine code for one operating system will run on another operating system, unless the first operating system supports running machine code built for the other operating system.

An ISA can be extended by adding instructions or other capabilities, or adding support for larger addresses and data values; an implementation of the extended ISA will still be able to execute machine code for versions of the ISA without those extensions. Machine code using those extensions will only run on implementations that support those extensions.

The binary compatibility that they provide makes ISAs one of the most fundamental abstractions in computing.

https://en.wikipedia.org/wiki/Instruction set architecture